Always remember, you are at most yourself; and, you are at least yourself.

Selected software projects 2005-2011

2011-07-24T19:59:00.000-07:00

0. EMC/EMI simulator IDE, 2005

http://kkshichao.blogspot.com/2007/03/minicad-stand-alo

ne-module-i-created-to.html

Role: Integrator and sole contributor for miniCAD module

Language & technology: core Java, SWING, Java 3D, Jakarta Commons

Tools & Environment: JBuilder, Visual Studio 6, Visual Source Safe, winXP/Unix

The whole project is a simulation studio which allows user to create/import geometry, applying surface meshing, setting up simulation parameters and submit remote simulation task over network and monitor the simulation progress and plotting simulation results in curves with xy coordinates.

The miniCAD is more than a scientific toy which allows researcher to create user defined geometry by keying shape and vertex information. The resulted geometry can be displayed, mouse manipulated, and surface meshed.

1. ProgramManager, 2006

http://kkshichao.blogspot.com/2007/03/programmanager-first-project-i-designed.html

Role: sole contributor

Language & technology: core Java, SWING, JDOM

Tools & Environment: JBuilder, winXP

2. FlowViewer -- project leader, main contributor, 2006

http://kkshichao.blogspot.com/2007/03/flowviewer-by-engineer-for-engineer.html

Role: project leader, main contributor

Language & technology: core Java, SWT, JDOM

Tools & Environment: Eclipse, winXP

3. CPU CoreChecker (BIOS), 2007

Role: sole contributor

Language & technology: Assembly, MASM

Tools & Environment: AMD x86, Microsoft Visual Studio 2005 with Phenix PCA, CVS

A bare bone Phenix BIOS which initializes the AMD CPU to the point just enough to detect the number of cores inside the node, and displays the information to the hardware LED port. The CoreChecker serves as a convenient daily utility tool for product engineers to check the number of cpu cores and help to identify the cpu types.

4. Bios Vending Machine, 2008

Role: key contributor for perl script

Language & technology: Perl, HTML, JavaScript, Assembly

Tools & Environment: AMD x86, SVN

The bios assembly code for microprocessor (CPU) from various batches and with various specs is stored in code version servers by branches and tags. The bios vending machine is actually a convenient bios binary builder with user friendly webpage front end. Selecting the proper cpu types and features from a web form, the background scripting engine will work to download the source code to the server memory and make necessary tweak in the source code to enable/disable certain features and invoke the corresponding bios build make files; upon successful build, the bios rom file will be provided to user through url link.

The background scripting is in Perl, and it is the first module I ever program using script.

5. Demo test solution for Pxxxxxxxc power device, 2008-2010

Role: sole contributor for NI PCI digitizer integration solution and dsp algorithm

Language & technology: Visual ATE, Microsoft Visual Studio 2005

Tools & Environment: winXP, National Instrument IDE, SVN

In ATE testing, digitizing is usually achieved by ATE instrument inside the test head. In this project, the insufficient digitizing capability of ATE instrument is complemented by NI PCI digitizer installed inside the workstation. The digitizing function is carefully placed inside the test program and fine tuned by the aide of graphical plotting module. The digital data is processed by simple dsp algorithms to get accurate para metrics.

The DSP algorithm was pre-developed in Matlab and characterized by empirical testing data before it is translated into C++ functions.

6. Rasco handler driver with temperature control capability, 2010

Role: sole contributor

Language & technology: Visual ATE, RS232, MFC

Tools & Environment: Microsoft Visual Studio 6, winNT

The RS232 driver is developed to empower the Rasco handler with temperature monitoring and feedback control capability, which are absent from our standard Rasco drivers.

7. Real time binning monitoring system for CX tester, 2011

Role: technical adviser

Language & technology: enVision, C++, Cron Job, UDP socket

Tools & Environment: g++, Solaris/CentOS

The customer wishes to develop a real time binning monitoring and data logging utility during lot testing. Our testing executable engine provides such capability through a complex call back interface. Customer has to develop their software module based on good understanding of the call back mechanism.

I reluctant resumed the architect and consult role knowing that several approaches has been adopted and failed after more than half a year efforts. After analyzed the failed data, I risked to discard all previous versions and re-created the skeleton of the program. I spent time to review and correct every version of customer code and managed to arrive at first workable version after 3 weeks of debugging.

8. Customized front end and data-logging solution for iXXXX, 2011

Role: sole contributor

Language & technology: Visual ATE, MFC, DLL

Tools & Environment: Microsoft Visual Studio 6, winNT

This is the first project written extensively in MFC after I learned MFC programming 6, 7 years ago and after it has substantially lost its popularity on windows platform. The choice was made because of winNT restriction. (I tried to implement the module in vs2005 first, but failed to port it to winNT after few hours of tweaking.)

What the module does is no more than spawning a MFC-based dialog form for operator to enter misc lot setup information, validating the string entries according to customer specs and formulating those strings into proper text and returning it to client for data logging purpose.

I later decided to write the module in MFC in Microsoft Visual Studio 6 (winNT) and packaged it in static MFC dll. I also developed a standalone C++ executable as test driver for module testing. A minimum set of API is exported for client programming.

Design Pattern (JAVA) : Singleton Pattern -- multithreaded

2011-02-16T05:31:00.000-08:00

"In computer programming, lazy initialization is the tactic of delaying the creation of an object, the calculation of a value, or some other expensive process until the first time it is needed." -- wiki

The general idea behind lazy initialization is to preserve memory in a resource constrained runtime environment; however, in some cases, lazy initialization puts system stability at risk due to failed initialization at runtime.

In a multi-threaded Java program, making class constructor private and check for singularity in getInstance() method is insufficient. When two threads invoke the getInstance() method simultaneously, there is still possibility of double instances being created due to interleaving.

1) using early initialization is one option to tackle the problem here. Object is created immediately when class is loaded in JVM. Thus, there is no interleaving issues. However, this could sacrifice some system performance.

2) making getInstance() method synchronized is another option; however, this is not absolutely necessary as the real problem here is that we wish to make the singularity checking portion synchronized only. Creating a synchronized method is an overkill.

3) Since JDK 1.5, we can use the 'enum' keyword to achieve this:

public enum Singleton {

INSTANCE;

//Singleton method
public void someMethod( ) {...}
}

Accessing the enum singleton :

Singleton.INSTANCE.someMethod( );

4) Finally the so called 'double checked locking' method:

public class Singleton {

 /** The unique instance **/
 private volatile static Singleton instance;

 /** The private constructor **/
 private Singleton() {}

 public static Singleton getInstance() {
   if (instance == null) {
       synchronized(Singleton.class) {
          if (instance == null) {
             instance = new Singleton();
          }
       }
    }
    return instance;
 }
}

[note, the getInstance() method is static method, thus we can not use synchronized(this) statement.

According to the JLS, variables declared volatile are supposed to be sequentially consistent, and therefore, not reordered.

Study notes 4 - lognormal distribution

2010-01-20T22:50:00.000-08:00

Random variable xL that is continuously distributed in interval is said to have lognormal distribution described by probability density function fL(xL) if variable xN, that is defined as xN=lnxL, has normal distribution described by probability density function fN(xN) in interval -∞ to ∞.

Denote the mean and variance of normally distributed variable as μ and σ2 respectively, then
mean of XL will be

Study notes 3 - Assumptions made by Black Scholes theory

2010-01-20T00:05:00.000-08:00

The following is quoted from site http://hilltop.bradley.edu/~arr/bsm/pg04.html

The Black and Scholes Option Pricing Model didn't appear overnight, in fact, Fisher Black started out working to create a valuation model for stock warrants. This work involved calculating a derivative to measure how the discount rate of a warrant varies with time and stock price. The result of this calculation held a striking resemblance to a well-known heat transfer equation. Soon after this discovery, Myron Scholes joined Black and the result of their work is a startlingly accurate option pricing model. Black and Scholes can't take all credit for their work, in fact their model is actually an improved version of a previous model developed by A. James Boness in his Ph.D. dissertation at the University of Chicago. Black and Scholes' improvements on the Boness model come in the form of a proof that the risk-free interest rate is the correct discount factor, and with the absence of assumptions regarding investor's risk preferences.

In order to understand the model itself, we divide it into two parts. The first part, SN(d1), derives the expected benefit from acquiring a stock outright. This is found by multiplying stock price [S] by the change in the call premium with respect to a change in the underlying stock price [N(d1)]. The second part of the model, Ke(-rt)N(d2), gives the present value of paying the exercise price on the expiration day. The fair market value of the call option is then calculated by taking the difference between these two parts.

Assumptions of the Black and Scholes Model:

1) The stock pays no dividends during the option's life

Most companies pay dividends to their share holders, so this might seem a serious limitation to the model considering the observation that higher dividend yields elicit lower call premiums. A common way of adjusting the model for this situation is to subtract the discounted value of a future dividend from the stock price.

2) European exercise terms are used

European exercise terms dictate that the option can only be exercised on the expiration date. American exercise term allow the option to be exercised at any time during the life of the option, making american options more valuable due to their greater flexibility. This limitation is not a major concern because very few calls are ever exercised before the last few days of their life. This is true because when you exercise a call early, you forfeit the remaining time value on the call and collect the intrinsic value. Towards the end of the life of a call, the remaining time value is very small, but the intrinsic value is the same.

3) Markets are efficient

This assumption suggests that people cannot consistently predict the direction of the market or an individual stock. The market operates continuously with share prices following a continuous Itô process. To understand what a continuous Itô process is, you must first know that a Markov process is "one where the observation in time period t depends only on the preceding observation." An Itô process is simply a Markov process in continuous time. If you were to draw a continuous process you would do so without picking the pen up from the piece of paper.

4) No commissions are charged

Usually market participants do have to pay a commission to buy or sell options. Even floor traders pay some kind of fee, but it is usually very small. The fees that Individual investor's pay is more substantial and can often distort the output of the model.

5) Interest rates remain constant and known

The Black and Scholes model uses the risk-free rate to represent this constant and known rate. In reality there is no such thing as the risk-free rate, but the discount rate on U.S. Government Treasury Bills with 30 days left until maturity is usually used to represent it. During periods of rapidly changing interest rates, these 30 day rates are often subject to change, thereby violating one of the assumptions of the model.

6) Returns are lognormally distributed

This assumption suggests, returns on the underlying stock are normally distributed, which is reasonable for most assets that offer options.

Study notes 2 - time value of money

2010-01-18T23:36:00.000-08:00

This continues from my last post. I will write down some notes on Black-Scholes theory.

1. time value of money.
Basically this is about interest and it represents the 'opportunity cost'. If you choose not to invest money in options, you can receive interest with relatively low or no risk.

Bearing this in mind, it will be different to receive some amount of money today as compared to receive equal amount a year later. Assuming an annual interest of i%, the amount of $Y to be received a year later will be deemed equivalent to the amount $Y/(1+i%) received today. Over here, we have introduced the concept of 'discount factor' (1/(1+i%)) to help to define the effect of time value of the money.

In Black-Scholes theory, with a few important mathematical assumptions made, the discount factor is calculated to be exp(-rT). It is more accurately called 'continuously compound interest'. Although it looked obscured, it does ring a bell for those with engineering background, exponential decay with respect to a period of time T at a factor of r.

Forget about mathematics, let's climb on the giant's shoulders first.

2. when you deposit your money with continuously compound interest r at t0, then at time (t0+t), your money plus interest will be exp(rt).

Study notes 1 - terminology and concepts about options

2010-01-17T22:23:00.000-08:00

I am reading the book Design.Patterns.and.Derivatives.Pricing by Mark S. Joshi. Since I am from Computer science and electronic engineering background, I have difficulty in understanding some of the financial terminologies.

I had some basic financial accounting knowledge from university general electives and some stock trading experience, so I venture to do some self studying through internet searching.

On chapter 1, a simple Monte Carlo model. A simple Monte Carlo simulation requires five parameters input, (expiry, strike, spot, vol, r, and NumberOfPaths).

The wikipedia page (http://en.wikipedia.org/wiki/Call_option) provides a very nice introduction about call options.

1. What is an option?
A call option is a contract formed between 'caller' and 'writer'. The caller predicts that the stock price (spot price) will rise beyond an agreed limit (i.e., the strike price) on a defined future date (Expiry date), thus he pays a premium to the writer to enter into a contract which entitles him(the 'caller') the right to exercise the option by purchasing the underlying stock from the writer at the strike price on this defined future date.

The caller has the right to exercise the option at his discretion, and if he chooses to do so, the writer must agree to sell the stock.

In essence, the buyer is paying for a chance to buy a stock at certain price (hopefully a discounted price), rather than to buy the real stock.

In the above explanation, stock is used just for illustrative purpose; in real world, the underlying financial instrument could be different.

2. how does an option differs from warrant?

To my understanding, from a mathematics point of view, the key difference is that warrants are dilutive, which means the company has to issue new shares when the warrants are exercised. Options is only about changing ownership of the underlying financial instruments.

3. how much does the buyer earn or lose?
=>> if spot price is higher than the strike price, and yes, that is what the buyer (caller) expected, his earnings amounts to
S=P-(Q+R)
(S) Trader A's total earnings .
(P) Sale of stock at spot price
(Q) Amount paid to purchase the stock at strike price upon exerise
(R) Contract commissions (the premium paid)

==> or, if the spot price is lower than the strike price, obviously, it does not make sense for the buyer(caller) to exercise the option (paying higher than market price to purchase the stock), thus his total loss will be equal to -R.

4. what is 'in-the-money' and payoff?
When the spot price is higher than the strike price, the option is said to be 'in-the-money', which means the option has monetary value to the buyer(caller).

The earnings for the buyer(caller) resulting from exercising the option is called 'payoff'.
When the option is 'in-the-money', the payoff is (spot price - strike price). Otherwise, the payoff is zero.

5. what is over-the-counter instrument?
This is a bit side track. Warrants are often called over-the-counter instruments, which means it is normally traded between financial institutions without exchange facilities, as opposed to exchange trading (like you trade stock in HKSE or SGX).

6. what are European call option and American call option?

A European call option allows the holder to exercise the option (i.e., to buy) only on the option expiration date. An American call option allows exercise at any time during the life of the option.

7. Call option vs put option

What we have discussed above is termed call option; in layman terms, if the contract is modified to entitle the buyer to sell the underlying stock at certain price, then the option is termed put option. Here of course the buyer is taking a 'short' position towards the underlying instrument.

Two funny types of deadlock

2009-06-30T20:28:00.000-07:00

case 1: two mutex are used: the 1st mutex is applied, and second mutex fails, and because of the poor design, the 1st mutex is not unlocked, and this causes all other threads (including the thread which holds the 2nd mutex) to halt. Thus, the 2nd mutex is locked perpetually, and so does the 1st mutex.

case 2: two mutex are used; the order of applying the mutex matters.

   void *function1()
    {
       ...
       pthread_mutex_lock(&lock1);           - Execution step 1
       pthread_mutex_lock(&lock2);           - Execution step 3 DEADLOCK!!!
       ...
       ...
       pthread_mutex_lock(&lock2);
       pthread_mutex_lock(&lock1);
       ...
    } 

    void *function2()
    {
       ...
       pthread_mutex_lock(&lock2);           - Execution step 2
       pthread_mutex_lock(&lock1);
       ...
       ...
       pthread_mutex_lock(&lock1);
       pthread_mutex_lock(&lock2);
       ...
    } 
  
    main()
    {
       ...
       pthread_create(&thread1, NULL, function1, NULL);
       pthread_create(&thread2, NULL, function1, NULL);
       ...
    }

strtok_r vs. strtok

2009-06-30T02:06:00.000-07:00

This is to demonstrate the dirty implementation of the strtok(). Try to replace strtok_r() with strtok() and observe the effect.
===============================================================
int getNumberBeforeDecimal(char *decimalNumber)
{
char numBeforeDecimal[6]="";
char *token, *p;

strcpy(numBeforeDecimal,decimalNumber);

strtok_r(numBeforeDecimal, ".", &p);
token = strtok_r(NULL, ".", &p);

return atoi(token);
}

int main(int argc, char *argv[])
{
char s[] = "14.23:23.41", *p;

char *tok = strtok_r(s,":", &p);
while(tok!=NULL) {
int num = getNumberBeforeDecimal(tok);
tok = strtok_r(NULL, ":", &p);
printf("pre-decimal: %d\n", num);
}

return 0;
}
=========================================================

Basically, strtok() modifies your string and creates surprise sometimes; and, it is thread unsafe.

This also pops to my mind that: we should always remember to declare variables to be constant if we do not intend to modify them.

database modeling vs. database design

2009-06-28T20:10:00.000-07:00

UML for Database Design

(http://www.ibm.com/developerworks/rational/library/302.html)

While database modeling focuses mostly on depicting the database, database
design encompasses the entire process from the creation of requirements, business
processes, logical analysis, and physical database constructs to the deployment
of the database.

to be continued...

Design Pattern (JAVA) : Singleton Pattern (2)

2009-03-12T20:51:00.000-07:00

Singleton with lazy initialization implementation:

final class Singleton {
private static Singleton s;
private static int i;
private Singleton(int x) { i = x; }
public static Singleton getReference() {
s = new Singleton(47);
return s;
}
public int getValue() { return i; }
public void setValue(int x) { i = x; }
}

without lazy initialization:

final class Singleton {
private static Singleton s = new Singleton(47);
private int i;
private Singleton(int x) { i = x; }
public static Singleton getReference() {
return s;
}
public int getValue() { return i; }
public void setValue(int x) { i = x; }
}

So points to note about the singleton pattern:
1) we have to create our own private version of the constructor in order to suppress the default constructor which will be spawn by the compiler.
2) we will create a public getReference() or getInstance() method for client to access the class.
3) we will take extra caution about ensuring class members are static if we wish to implement lazy initialization.
4) we will make the class final in order to prevent client to extend this class and make it clone able accidentally.

Design Pattern (JAVA) : Singleton Pattern

2009-03-11T23:23:00.000-07:00

Design patterns summarize proven solutions for typical object oriented programming problems and help to minimize the design effort and eliminate the common mistakes. To understand the necessity of design patterns, we can always look at the problems and begin by tackling it with alternative or brutal force methods, and learn to appreciate the beauty and implications of design patterns.

In many cases, we wish to maintain a single instance of certain class at run time, e.g., we may wish to keep one single connection to a specific database, or we wish to a have a single sequential number generator to avoid duplication.

We can approach the problem in a few ways, and let's analyze them one by one:
a) We can create a 'global' instance of the class, and let all clients use this instance for activities associated with the class. This is fine provided that every client knows about such arrangement and follow it rigidly and diligently. In other words, we are delegating part of the class design responsibility to the 'customers' of the class. This is a sub-optimal solution.

b) We can monitor and control the class instantiation inside the class definition; we could create a static class member which might be boolean or int, and let the class constructor check it before class creation; no class will be created if the check fails. Yes, this sounds logical and feasible. The next thing we need to consider is: what to do if the check fails? How does the client know about the class instantiation failure? Remember that constructor method does NOT return anything as normal method does. A simple solution would be to let the constructor method throw out an exception, and let the client check and handle the exceptions.

Okay, this looks better, but still a little bit troublesome, right?

c) Using static methods.
class PrintSpooler
{
static String str;
//a static class implementation of Singleton pattern
static public void set(String s)
{
str = s;
}

static public void print()
{
System.out.println(str);
}
}
//==============================
public class staticPrint
{
public static void main(String argv[])
{
PrintSpooler ps = new PrintSpooler();
ps.set("orginal?");

PrintSpooler ps2 = new PrintSpooler();
ps2.set("different?");
ps.print();
}
}

d) How about we make the constructor private, and force user to create an instance of the class using another normal member method? Yes, that is the deal.

class iSpooler
{

static boolean instance_flag = false; //true if 1 instance

private iSpooler() { }

//static Instance method returns one instance or null
static public iSpooler Instance()
{
if (! instance_flag)
{
instance_flag = true;
return new iSpooler(); //only callable from within
}
else
return null; //return no further instances
}

public void finalize()
{
instance_flag = false;
}
}

Feature dimension reduction for microarray data analysis using Locally Linear Embedding

2009-02-03T05:38:00.001-08:00

Shi Chao, Chen Lihui, in Proceedings of the 3^rd Asia-Pacific Bioinformatics Conference, Advances in Bioinformatics and Computational Biology, vol. 1, 2005. download!

Abstract

Cancer classification is one major application of microarray data analysis. Due to the ultra high dimensionality nature of microarray data, data dimension reduction has drawn special attention for such type of data analysis. The currently available data dimension reduction methods are either supervised, where data need to be labeled, or computational complex. In this paper, we proposed to use a revised locally linear embedding(LLE) method, which is purely unsupervised and fast as the feature extraction strategy for microarray data analysis. Three public available microarray datasets have been used to test the proposed method. The effectiveness of LLE is evaluated by the classification accuracy of a SVM classifier. Generally, the results are promising.

High dimensional gene expression data dimension reduction

2009-02-02T01:06:00.000-08:00

Shi Chao, Chen Lihui, in Proceedings of IEEE Conference on Cybernetics and Intelligent Systems (CIS), Dec 2004. download!

Abstract

Gene expression data analysis is a new approach in cancer diagnosis. Feature selection is an important preprocessing step in gene expression data clustering. In this paper, we demonstrate the effectiveness of feature grouping approach in feature dimension reduction. In our proposed framework, large number of features is grouped to form several feature subsets. By criteria of clustering accuracy, one feature subset is chosen as the candidate subset for further processing by PCA or entropy ranking, and the final feature subset are formed by selecting the features from top ranked ones. Advantage of the framework is that it considers both subset and individual feature's discrimination power, also it requires little information about the class label. A prototype of the proposed framework has been implemented and tested on the leukemia data set. The results have given positive support to the framework.

Quickly Find/Open a File in Visual Studio

2008-09-23T01:57:00.000-07:00

The following content is from site: (http://www.alteridem.net/2007/09/11/quickly-findopen-a-file-in-visual-studio/)

Here is a cool Visual Studio feature that almost nobody knows about. If you want to open up a file in your solution, but can’t be bothered to dig down through your projects and folders to find it, try this,

Click in the Find box in the toolbar,
Type >of followed by a space, then begin the name of the file you are looking for.
An auto-complete drop down will appear as you type filtering all the files in all your projects in your solution. Continue typing until the list is short enough to fine the one you want. Select it and hit enter.
The file will open in the editor.

Another useful tip is that Ctrl+D or Ctrl+/ will automatically jump to the find box, so your hands don’t even need to leave your keyboard.

on makefile

2008-07-28T06:23:00.000-07:00

some notes on makefile:

The basic basic rule: 'target' depends on 'prerequisites' and the relationship is defined by 'command'.
target ... : prerequisites ...
command

version 1
objects = main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o
edit : $(objects)
cc -o edit $(objects)
main.o : defs.h
kbd.o : defs.h command.h
command.o : defs.h command.h
display.o : defs.h buffer.h
insert.o : defs.h buffer.h
search.o : defs.h buffer.h
files.o : defs.h buffer.h command.h
utils.o : defs.h
.PHONY : clean
clean :
rm edit $(objects)

version 2
objects = main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o
edit : $(objects)
cc -o edit $(objects)
$(objects) : defs.h
kbd.o command.o files.o : command.h
display.o insert.o search.o files.o : buffer.h
.PHONY : clean
clean :
rm edit $(objects)

.PHONY is followed by a pseudo target and it only defines a series of action, rather than files dependencies.

.PHONY : clean
clean :
-rm edit $(objects)

The '-' in front of rm means 'go ahead' about the action and do not stop for errors.

Polymorphism, RTTI, and MFC run time type info, what is my choice?

2007-12-13T18:47:00.000-08:00

Polymorphism is one very important feature of C++ and a pivotal concept from OOP. Yet, we often distract ourself to other more restrictive implementations, when what we really need is a C++ virtual function.

A nice article from a C++guru, Ovidiu Cucu, illustrated this with a rather classical programming example. (http://www.codeguru.com/cpp/cpp/cpp_mfc/general/article.php/c14535__3/)

Let me just quote his final words in this article as a quick note:

"You can implement run-time type checking by using RTTI or the old MFC-like mechanism, but usually that's not absolutely needed."

One more thing I wish to add here. Look at the example from above article using polymorphism methods below; the 'virtual' keyword preceding the function definition in the derived classes are NOT necessary for late-binding to work. Just put it in base class is enough.

Another note: use of pure virtual function is NOT necessary unless you wish to force the user to re-define this method in the derived classes; if a particular function is declared pure virtual, and yet not implemented in derived class, then the code won't compile. There will be a compiler error. In this case, we achieved something similar to 'interface' in Java, if you are familiar with J2SE.
=============================================
#include

class Animal
{
public:
// pure virtual function
virtual void ISay() = 0;
};

class Dog : public Animal
{
public:
// specific implementation for Dog
virtual void ISay() {std::cout << "Bark! ";}
};

class Cat : public Animal
{
public:
// specific implementation for Cat
virtual void ISay() {std::cout << "Miaou! ";}
};

class CFoo
{
public:
void AnimalSays(Animal*);
};

int main(int argc, char* argv[])
{
Dog rex;
Cat kitty;
CFoo foo;

foo.AnimalSays(&rex);
foo.AnimalSays(&kitty);

return 0;
}

void CFoo::AnimalSays(Animal* pAnimal)
{
pAnimal->ISay();
}
=============================================

A few prime tools on unix programming

2007-11-18T23:42:00.000-08:00

My previous experience with unix has limited to cc/gcc, vim, shell scripts, .cshrc and knowledge of some configuration files.

Recently, due to my job needs, I have tried to learn some make/nmake programming. After 1,2 days googling, I managed to dig up two good references. One is the 'NMAKE reference' from MSDN, and it is dedicated to Microsoft NMAKE, of course. I didn't find any downloadable version. The other is a tuotorial-like blog series on GNU MAKE usage from a very experienced Chinese programmer (google 跟我一起写Makefile). Fans have spent time to put the series together into a more readable PDF file. It is long, complete with many useful examples. It is very useful as both tutorial and reference manual.

Here, ladies and gentlemen, I am going to introduce some byproducts from my learning journey. (Thanks to the 2nd reference mentioned above.) You may already heard the name of SED and AWK, two famous unix utilities. What are they? read the following from: http://www.faqs.org/docs/abs/HTML/sedawk.html

sed: a non-interactive text file editor
awk: a field-oriented pattern processing language with a C-like syntax

Despite all their differences, the two utilities share a similar invocation syntax, both use regular expressions, both read input by default from stdin, and both output to stdout. These are well-behaved UNIX tools, and they work together well. The output from one can be piped into the other, and their combined capabilities give shell scripts some of the power of Perl.

so, try it!

Why serial? Why not parallel?

2007-11-15T00:51:00.000-08:00

Why the latest data transmission bus favors serial comm over parallel comm? Why a single data line could outperform a group of lines carrying signals in parallel? this is a really fundamental question, however, for long time, I am confused. Here is a good explanatory article from http://www.hardwaresecrets.com/article/190/2

I favor such good articles which articulates fundamental yet confusing scientific or engineering issues in simple terms. Thanks a lot to the original authors. I have quoted a few in my blog, and I will continue to recommend more in future.

From Parallel to Serial

The PCI Express bus (formerly known as 3GIO) represents an extraordinary advance in the way peripheral devices communicate with the computer. It differs from the PCI bus in many aspects, but the most important one is the way data is transferred. The PCI Express bus is an example of how PC data transfer is migrating from parallel communication to serial communication. Read our article Why Serial? to understand the differences between serial and parallel communications.

Almost all PC buses (ISA, EISA, MCA, VLB, PCI and AGP) use parallel communication. Parallel communication differs from the serial one because it transmits several bits at a time, while in serial communication only one bit is transmitted at a time. This makes, at first, parallel communication faster than the serial one, since the higher the number of bits transmitted at a time, the faster the communication will be.

But parallel communication suffers from some problems that prevent transmissions from reaching higher clocks. The higher the clock, the greater will be the problems with magnetic interference and propagation delay.

When the electric current passes flows through a wire, an electromagnetic field is created around it. If the electromagnetic field created by the wire happens to be very strong, noise will be produced in the near wire, corrupting the information being transmitted. As in parallel transmission several bits are transmitted at a time, each bit involved in the transmission uses one wire. For example, in a 32-bit communication (such as the PCI slot) it’s necessary to have 32 wires just to transmit data, not counting additional control signals that are also necessary. The higher the clock, the greater the electromagnetic interference problem.

As we have commented before, each bit in parallel communication is transmitted in a separate wire. But it’s almost impossible to make those 32 wires have exactly the same length in a motherboard. This difference in wire length didn’t alter the way the bus worked in older PCs, but due to the increased speed in which data is transmitted (clock), data transmitted through shorter wires started to arrive before the rest of the data that was transmitted through longer wires. That is, the bits in parallel communication started to arrive out of order.

As a consequence, the receptor device has to wait for all bits to arrive in order to process the complete data, which represents significant loss in performance. This problem is known as propagation delay and, as we said, becomes worse with the increase in the operating frequency (clock).

The project of a bus using serial communication is much more simple to be implemented than one using parallel communication, since only two wires are necessary to data transmission (one wire for data transmission and one ground wire). Besides, serial communication allows operation with much higher clocks than those used in parallel communication, since problems with the electromagnetic interference and propagation delay appear most frequently in parallel communication, which prevents high clocks from being reached in the transmissions. Another difference between parallel communication and serial communication is that parallel communication is usually half-duplex (the same wires are used both to transmit and to receive data) due to the high number of wires that are necessary to its implementation, while serial communication is full-duplex (there’s a separate set of wires to transmit data and another one to receive data) because it needs just two wires.

That’s why engineers adopted serial communication instead of parallel communication in PCI Express bus.

Now you might be asking yourself: isn’t serial communication slower? Not necessarily, and the PCI Express bus is a good example: if higher clock is used, serial communication is faster than parallel communication.

We’ll talk about how the PCI Express bus works on the next page.

GUI design engineering

2007-10-03T19:28:00.000-07:00

Many people view GUI(HMI) design as the cosmetic aspect of the underlying engineering products or problems; other people view this a serious engineering topic as part of the products/problems.

In a highly competitive business world where quality and customer satisfaction is ultimately emphasized, software is more appropriately addressed as service rather than product. Thus, software usability depends on both the 'quality' in a traditional sense, but also customer experience. However, very often than not, we are seeing people/company creating/upgrading products which prevent people from using it or loving it (you hate it, yet, you may still have to use it, :( ).

As a very intensive sofware user, observer, I wish to compile a check list as warning for all GUI engineers, including myself.

1) do not use out-dated technologies for the sake of compatibility; be a hero, lead the revolution! we should avoid creating software which we know will only survive a few months.

2) do not count on users to read and comprehand your thick mauals! let your software speak for itself. Use their language and sign, follow their thinking, and mimic their habits.

3) do not let user repetitively input information. And, you know what I am talking about. That is NOT called validation or security measure, it is called 'amnesia'. Always remember what the user has told you until they have logged out or timed out.

4) be intelligent. Try to make use of known information on the fly, and avoid asking stupid questions. (we do not ask NRIC number from a foreigner.)

5) always leave your user a choice. Customer is god! your god should be able to do whatever whenever they want. They should be able to quit, delete, save, roll back, un-subscribe, un-focus, etc anytime on any page.

6) allow user to copy n paste, including pictures and objects.

7) consider i18n, if you can not support it, at least do not let it ruin the running instance of your program. (There are many such cases in the web: when you switch the input method, the page hangs or browser suicides.)

8) consider error handling. that is one of the basics in software engineering. Testing cases are part of error handling design.)

9) do not display useless information. Exception stacks are only useful to programmers, do not let them run out of the curtain, and that just adds to the frustration over the awkward accident. if it is going to die inevitably, let it die silently and rest in peace.

*) last but not least, never assume your software is perfect. the most we can achieve is 99.9, and 100 is hallucination. Consider debugging and error logging devices seriously ever since the design stage. Software which does not allow debugging and error logging can hardly achieve a passing grade.

greatest common divisor

2007-09-26T00:59:00.000-07:00

//while loop version
int gcd(int m, int n)
{
int r, q, d;
while (n!=0)
{
r = m % n;
q = m / n;
r = m - n * q;
m = n;
n = r;
}
return q;
}

//a recursive version, pretty, but maybe slower :)
int gcd(int m, int n)
{
if (!m || !n) return 0;
if (m < 0) return gcd(-m,n);
if (n < 0) return gcd(m,-n);
if (m < n) return gcd(n,m);
if (m%n) return gcd(n, m%n);
return n;
}

Harvard architecture vs von Neumann architecture

2007-09-26T00:45:00.000-07:00

I was asked about the architecture difference between the Harward model and the von Neumann model during an interview. Shame! Shame! Shame! I only rememeber Harward was faster in certain mathematical calculation, such as Fourier transform.

Here is something I extracted from wikipedia.org.

Harward has the physically separated data and instruction storage and pathways, which means it has the capability to read instruction and read/write data at the same time. Obviously, this is not possible in the classical x86 architecure, since our data and instruction are all stored in the ram (from hardisk) and read/write through the shared data/address bus. One thing has to note: the cache. We are talking about the case of von Neumann model without cache here.

some extremely compact guide to MS .NET

2007-08-09T19:48:00.000-07:00

first, you are right, MS.NET is extremely similar to Java, language grammar wise and language or platform design wise.

how does .Net work?

1. the source code (any .net supported language, vb.net, c#.net,etc.) is compiled into MSIL (intermediate language, something like Java bytecode).

2. at execution, the MSIL is compiled into instructions by JIT (just in time) compiler to become 'managed native code' ,and then

3. runs on CLR (common language runtime).

sounds like Java?

ok, let take a look at some source code.

using System ;
Class Hello
{
Public static void Main ()
{
Console.writeLine ("Hello C#");
}
} //end of the main

not only sounds like Java, it also looks like.....

some tricky but fundmental interview questions (Java)

2007-07-16T00:18:00.000-07:00

1. checked vs unchecked exceptions

what are the difference?
first, checked exceptions are checked by compiler at compiling time. So programmers are compulsory to handle them; while unchecked exceptions are NOT, and they are reported at runtime. There is actually no way or too expensive to check them at compile time, like array out of bound exception, negative array index, or something very serious, and not remediable.

2. are all methods of parent class inherited?

NO, constructors are of exceptions. They can not be inherited.

3. what is HashCode()?

HashCode() returns the memory address of the owner class. And, Equals() without overriding compares memory address of the two classes.

4.When To Use Interfaces
An interface allows somebody to start from scratch to implement your interface or implement your interface in some other code whose original or primary purpose was quite different from your interface. To them, your interface is only incidental, something that have to add on to the their code to be able to use your package.
When To Use Abstract classes

An abstract class, in contrast, provides more structure. It usually defines some default implementations and provides some tools useful for a full implementation. The catch is, code using it must use your class as the base. That may be highly inconvenient if the other programmers wanting to use your package have already developed their own class hierarchy independently. In Java, a class can inherit from only one base class.

for Technorati claim

2007-06-19T02:27:00.000-07:00

Technorati Profile

A simple note on port access under windows NT

2007-06-12T03:00:00.000-07:00

I intend to write a short on port access under windows now.

1. Using Microsoft VB, you can not do port access stuff, whatever, NO. If you really need, use c/c++ to write the function, and port to dll, call it from your vb project.

2. under DOS, win98, winMe, port is open accessible; however, for NT kernel system, like winNT, win2000, winXP, direct port access is blocked; to access the port, there are two methods commonly adopted:

a) get/write a driver, like giveio.sys, and load it to grant access inside your project, prior to any port accessing;

b) if you code is already there, or you only have the executable, use portTalk/allowIo to invoke your application and grant access to some port by command line arguments;

------------------------------------------------------------------------------------------
how is the blocking mechanism under NT kernel system working?

basically, under NT kernel, programs run in two mode, user mode and kernel mode. User mode are considered unstable, and thus restricted by OS. it works in this way:
a> user mode program runs in privilege level ring 3, and kernel mode program runs in privilege leve ring 0.
b> if a program request to access a port, the OS checks for two things:
1) if the program runs in ring 0, ok, go; otherwise
2) check the IOPM mapping in TSS, if the corresponding bit for the port is cleared, ok, go, otherwise
3) blocked!!!

--------------------------------------------------------------------------------------------
how does driver like giveio.sys or port talk walk around the limitation?

it changes the IOPM to grant access for certain process; how? the answer is , there is some un-documented api under windows to manipulate the bit in IOPM.

------------------------------------------------------------------------------------
what is IOPM?

forget about the details if you are not interested. it is some system managed memory, each bit inside represents the access right for one port. Bit 1(default value) means blocking, and bit 0 means green light.

How is the details? how does it really really works?

do not ask; u need something like SoftICE or winDBG to dig into TSS to see it yourself. did i? NOT yet. It is not straight forward to me.

anything wrong or inaccurate above, leave a comment. thanks

From "Undocumented Windows 2000 Secrets" (1)

2007-06-08T00:50:00.000-07:00

The first obstacle is that debugging usually involves two separate machines connected by a cable—one running the debugger, the other one hosting the debuggee.

However, there is a much easier way, eliminating the necessity of a second machine, if live debugging is not a requirement. For example, if a buggy application throws an unhandled exception causing the infamous NT “Blue Screen Of Death” (BSOD) to pop up, you can choose to save the memory image that was in effect right before the crash to a file and examine this crash dump after rebooting. This technique is usually called post mortem debugging (post mortem
is Latin and means “after death”).

A really really nice page!

2007-06-08T00:41:00.001-07:00

hi, all, here, look here:
http://www.rawol.com/?topic=77

a free download of Undocumented Windows 2000 Secrets in nice pdf format for download or online browse!!!

Let's start from how to access ports under Windows NT

2007-06-07T19:53:00.000-07:00

From KMD:

Most strange thing here is that we have accessed the SMOS memory without the system stops us. As I have already mentioned above, the access to I/O ports is protected under Windows NT. Executing IN or OUT instruction in user-mode will cause process termination. But we have touched them. How it can be? Well, it becomes possible due to the giveio driver.

The driver's code is based on well-known example (giveio) by Dale Roberts. I have decided it will be appropriate to mention here.

Our driver changes the I/O permission bit map (IOPM) that allows the process free access to the I/O ports. Each process has its own I/O permission bit map, thus access to the individual I/O ports can be granted to the individual process. Each bit in the I/O permission bit map corresponds to the byte I/O port. If this bit is set, the access to the corresponding port is forbidden, if it is clear the process may access this I/O port. Since the I/O address space consists of 64K individually addressable 8-bit I/O ports, the maximum IOPM size is 2000h bytes.

The purpose of the TSS is to save the state of the processor during task or context switches. For performance reasons, Windows NT does not use this architectural feature and maintains one base TSS that all processes share. This means that IOPM is also shared. So any changes to it are not private for particular process but are system-wide.

There are some undocumented functions in the ntoskrnl.exe to manipulate with the IOPM:
Ke386QueryIoAccessMap and Ke386SetIoAccessMap.
Ke386QueryIoAccessMap proto stdcall dwFlag:DWORD, pIopm:PVOID

Ke386QueryIoAccessMap copies current IOPM by the size of 2000h bytes from TSS to the memory buffer pointed to by pIopm parameter.

Ke386SetIoAccessMap copies specified IOPM by the size of 2000h from the memory buffer pointed to by pIopm parameter to TSS.

[some comment from http://www.nsfocus.net/index.php?act=magazine&do=view&mid=2205]

I think these comments are extremely necessary, so I decided to concatenate them here.

通过前面对 NT 系统中 KTSS 结构和实际内存的分析，我们可以了解：NT 环境下，每个进程单独维护了一个 TSS 内存区域，其中由 TSS 内部维护了一个全部标志位置 1 的 IOPM 表，在 TSS 末尾还维护了另外一个实际中承担端口管理工作的 IOPM 表。Ke386SetIoAccessMap 函数(ntos\ke\i386\iopm.c:80)和 Ke386QueryIoAccessMap 函数(ntos\ke\i386\iopm.c:235)就是系统提供用来读写这两个 IOPM 表的函数。而 Ke386IoSetAccessProcess 函数(ntos\ke\i386\iopm.c:318)则指定进程到底使用哪个 IOPM 表。

对前两个函数来说，MapNumber指定要对哪个表进行操作。系统定义了一个 IO_ACCESS_MAP_NONE = 0 常量表示在 TSS 后面那个真实 IOPM 表，而其他的索引对应于 KTSS.IoMaps[] 数组。此数组大多数情况下只有一个表项，也就是说 MapNumber 为 0 时表示 TSS 后面那个 IOPM；为 1 时表示 TSS 内部的 KTSS.IoMaps[0]。 Ke386QueryIoAccessMap 函数只是简单的根据 MapNumber 判断是将 IoAccessMap 内容全部置位(MapNumber = 0)、还是从 TSS 中复制对应的表 (0 < iopm_count =" 1)。伪代码如下：

#define IOPM_COUNT 1
#define IOPM_SIZE 8192 // Size of map callers can set.

BOOLEAN Ke386QueryIoAccessMap(ULONG MapNumber, PKIO_ACCESS_MAP IoAccessMap)
{
if(MapNumber > IOPM_COUNT) return FALSE;

if(MapNumber == IO_ACCESS_MAP_NONE)
{
memset(IoAccessMap, -1, IOPM_SIZE);
}
else
{
void *pIOPM = &(KiPcr()->TSS->IoMaps[MapNumber-1].IoMap);

memcpy(IoAccessMap, pIOPM, IOPM_SIZE);
}
return TRUE;
}

而 Ke386SetIoAccessMap 在 MapNumber 为 0 时直接返回 FALSE，因为 TSS 后的那个表是不允许修改的；对其他情况，函数将 IoAccessMap 中的内容复制回 TSS 的 IOPM 表中，并在多处理器情况下通知其他处理器重新载入 IOPM 表。伪代码如下：

BOOLEAN Ke386SetIoAccessMap(ULONG MapNumber, PKIO_ACCESS_MAP IoAccessMap)
{
if((MapNumber > IOPM_COUNT) (MapNumber == IO_ACCESS_MAP_NONE)) return FALSE;

void *pIOPM = &(KiPcr()->TSS->IoMaps[MapNumber-1].IoMap);

memcpy(pIOPM, IoAccessMap, IOPM_SIZE);

KiPcr()->TSS->IoMapBase = GetCurrentProcess()->IopmOffset;

// 通知其他处理器重设 IOPM

return TRUE;
}

Ke386IoSetAccessProcess 函数则简单地修改当前 TSS 的 IOPM 偏移为 MapNumber 指定的 IOPM 表偏移，并在多 CPU 情况下通知其他 CPU 重新载入 IOPM 偏移。计算偏移算法如下：

#define KiComputeIopmOffset(MapNumber) \
(MapNumber == IO_ACCESS_MAP_NONE) ? \
(USHORT)(sizeof(KTSS)) : \
(USHORT)(FIELD_OFFSET(KTSS, IoMaps[MapNumber-1].IoMap))
USHORT MapOffset = KiComputeIopmOffset(MapNumber);

完整的使用流程代码如下：

#define IOPM_SIZE 8192 // Size of map callers can set.

typedef UCHAR KIO_ACCESS_MAP[IOPM_SIZE];
typedef KIO_ACCESS_MAP *PKIO_ACCESS_MAP;

PKIO_ACCESS_MAP IOPM_local = MmAllocateNonCachedMemory(sizeof(IOPM));
if(IOPM_local == 0)
return STATUS_INSUFFICIENT_RESOURCES;

Ke386QueryIoAccessMap(1, IOPM_local);

// 修改 IOPM_Local 内容打开需要使用的端口
Ke386SetIoAccessMap(1, IOPM_local);
Ke386IoSetAccessProcess(PsGetCurrentProcess(), 1);

I will make the English translation later.

from KMD tutorial

2007-05-28T18:10:00.000-07:00

Windows NT internals are divided by two distinct part concerning both address space and code permissions and responsibilities.
Address space sharing is amazingly simple. Whole four gigabytes of memory available in 32-bit architecture divided by two equal parts (4GT RAM Tuning and Physical Address Extension omitted as an exotic case). The address space for a user-mode processes is mapped into the lower 2GB of linear memory at addresses 00000000 - 7FFFFFFFh. The upper 2GB of linear memory address range 80000000h - 0FFFFFFFFh maps system components such as device drivers, system memory pools, system data structures etc. Sharing permissions and responsibilities is slightly complicated.

The architecture of the Intel x86 processor defines four privilege levels (known as rings). Windows uses privilege level 0 (or ring 0) for kernel-mode and privilege level 3 (or ring 3) for user-mode. The reason Windows uses only two levels is that some of the hardware architectures that were supported in the past (such as Compaq Alpha and Silicon Graphics MIPS) implemented only two privilege levels.

Properly speaking the user-mode applications are completely separated from the operating system. It's good for the integrity of the operating system but it could be a headache for some kind of utility application such as debugging tools. Fortunately, unrestricted access provided by the kernel-mode drivers could be used to perform practically impossible tasks on behalf of user-mode applications. So, if you plan to access internal operating system functions or data structures that are not accessible in user-mode, the only way is to load a kernel-mode driver into the system address space. It's rather simple, yet reliable and completely supported by the operating system itself.

Some very very useful unix command !!!

2007-05-23T00:37:00.000-07:00

There is something I wish I could remember and forget again and again, so I note them down.

.tar ; use tar -xvvf to un-tar them
.gz ; use uncompress

find . -name xxx ; search for a file or dir named xxx in the current directory

rm ; to delete a file
rm -r ; to delete a directory

more ; to see the first few lines of a file
less ; to see the last few lines of a file

rpm -ivh packageName ; to install a rpm package

Some debugging tools for system developers

2007-05-16T02:46:00.000-07:00

Here is some good assembly tools that worth recommendations.

* windows Debug.exe
The only 16 bit debugger that I know is debug.exe; it is free, and it comes with every modern windows system, just type 'debug a.exe' from command prompt to use it.

* dependency walker
A nice DLL dependency analyzer from microsoft. It will list different PE section information according to windows PE format.

* PE browser
A 3rd party free tool. Nice work! It is capable of de-assemble 32 bit executable, and comment it nicely.

* OllyDBG
Quite famous tool among assembly programmers. It is capable to de-assemble 32 bit executable, and trace code while watching memory and processor registers.

* Visual studio dumpbin
I have not tried yet. no comment.

please leave a comment if you know of any good de-assembler and executable analyzer. thanks for sharing!

some notes on masm

2007-05-16T02:44:00.000-07:00

summary on c style calling convention:

1. the caller needs to push params to stack
2. params are pushed from right to left
3. caller needs to adjust the stack after 'call' (increase the sp)

! you do want to miss this -- ultra ugly tricks in batch

2007-05-15T02:10:00.000-07:00

here I will introduce three ugly tricks to do one simple task -- get the batch file path from inside

1. very ugly, appears very sophisticated, very profound

for /f %%i in ("%0") do set curpath=%%~dpi
cd /d %curpath%

[%0 returns the file path and name that your typed at command prompt to run the batch, and ~dp means to get drive and path]

2. much more simpler, and easier to understand

cd /d %~dp0

[see explanation in item 1]

3. simple and maybe can not be simpler

cd /d %0\..

[do I need to explain? ]

What is Delay loading DLL?

2007-05-14T18:13:00.000-07:00

This is a popular terms cited under windows programming. What is really a delayed loading of DLL? You can get a rought idea from the following article from codeproject.com

http://www.codeproject.com/dll/Delay_Loading_Dll.asp

Normally, if you executable reference a API function in another DLL, windows loader will attempt to load the DLL into memory, and report error if the DLL is missing or out of date. If your application has a lot of DLL dependancy, then the loading process will be long, even if you just made one API call to each DLL.

Delay Loading of DLL simply means the DLL is not loaded until a call to the API inside has been made. By adding a few linker directive in the exe, the windows loader will be able to do so.

Disadvantage: if the underlying dll is missing, it will only be discovered when the call the API in dll has been made, and your program maybe terminated abruptly at run time. SO a Structure Exception Handler (SEH) is suggested.

bootup sequence from disk perspective -- a chinese version

2007-05-13T18:59:00.000-07:00

http://211.90.241.130:22366/view.asp?file=309
罗云彬的网站教程

三. 系统启动过程简介系统启动过程主要由一下几步组成(以硬盘启动为例):
1. 开机 :-)
2. BIOS 加电自检 ( Power On Self Test -- POST ) 内存地址为 0ffff:0000
3. 将硬盘第一个扇区 (0头0道1扇区, 也就是Boot Sector) 读入内存地址 0000:7c00 处.
4. 检查 (WORD) 0000:7dfe 是否等于 0xaa55, 若不等于则转去尝试其他启动介质, 如果没有其他启动介质则显示 "No ROM BASIC" 然后死机.
5. 跳转到 0000:7c00 处执行 MBR 中的程序.
6. MBR 首先将自己复制到 0000:0600 处, 然后继续执行.
7. 在主分区表中搜索标志为活动的分区. 如果发现没有活动分区或有不止一个活动分区, 则转停止.
8. 将活动分区的第一个扇区读入内存地址 0000:7c00 处.
9. 检查 (WORD) 0000:7dfe 是否等于 0xaa55, 若不等于则显示 "Missing Operating System" 然后停止, 或尝试软盘启动.
10. 跳转到 0000:7c00 处继续执行特定系统的启动程序.
11. 启动系统 ...

以上步骤中 2,3,4,5 步是由 BIOS 的引导程序完成. 6,7,8,9,10步由MBR中的引导程序完成.

the many difference between 16 bit asm and 32 bit asm

2007-05-12T02:14:00.000-07:00

There are many things being different between 16 bit asm programming and 32 bit asm programming.

* The introduction of 32 bit segment registers. (EAX, EBX, etc)

* A program written in native 32 bit Windows format is created in what is called FLAT memory model which has a single segment that contains both code and data. The programs must be run on a 386 or higher processor.

* Differing from earlier 16 bit code that used combined segment and offset addressing with a 64k segment limit, FLAT memory model works only in offsets and has a range of 4 gigabytes. This makes assembler easier to write and the code is generally a lot faster.

* All segment registers are automatically set to the same value with this memory model and this means that segment / offset addressing must NOT be used in 32 bit programs that run in 32 bit Windows.

* For programmers who have written code in DOS, a 32 bit Windows PE executable file is similar in some respects to a dos COM file, they have a single segment that can contain both code and data and they both work directly in offsets, neither use Segment / Offset addressing. The defaults in flat-model programs are NEAR code addressing and NEAR data addressing within the range of 4 gigabytes.

* The addition of FS and GS segment registers in 32 bit mode. The FS and GS segment registers are not normally used in application programs but are used in some instances by the operating system.

* 32 bit mode has introduced the concept of priority which helps for memory organization and isolation.

What is MBR, and How it works?

2007-05-11T01:42:00.000-07:00

the following information is based on my understanding of the following webpage, please read the original site for detailed explanation.
http://mirror.href.com/thestarman/asm/mbr/Win2kmbr.htm

MBR is the first sector in the first cylinder, first head of the current Master hard drive active partition. It is a 512 bytes (one sector) long paragraph of data and code.

* what is inside the MBR? -- under windows, you can use any binary reader to open c:\windows\system32\dmadmin.exe, and the MBR code itself is found between offsets 34E28h through 35027h. It contains some machine code, some error message, some OS related remarks and last but not least, the partition table.

* how it is invoked? -- I am not very sure about my answer, but I do provide short answer here. remember the DOS interrupt int 13? Yes, int 13 is used in BIOS to load this particular sector into memory location 0000:7c00. The processor will execute the code from 0000:7c00, and somewhere at 0000:7c1B, the code will try to copy the rest of the sector (about 485 bytes long) to another memory location.

[why make another copy? because this copy in memory will be overwritten by boot sector of the active partition later. the remaining code has to find itself a new home. :) ]

The website listed above provide some code comment to the disassembled MBR machine code. nice work!

How does IBM compatible PC boot up?

2007-05-09T22:56:00.000-07:00

precaution: do not take my statement word by word, this is just very very rough and inaccurate guide on this topic.

--- it all starts with a cold reset.

--- the processor will try to look for a BIOS rom at a pre-defined sytem IO address (F000:FFF0)

--- if the ROM is found and it is valid, processor will try to execute the BIOS code in the rom, and doing all hardware validation and initialization stuff (so called Power On Self Check, or POST)

[ after the memory controller is initialized successfully, part of the ROM code and data will be copied (or you call shadowed) to the DRAM, and execution continues from there.]

--- when all this done, and a default or user preferred fix storage is detected (e.g. a hdd)

--- processor will look into the first sector of the hdd partition (so called Master boot record, or MBR)

[MBR is a 512 bytes long area in hdd, and it contains the disk partition, vendor info, and something related to 2nd stage boot loader, while the MBR is considered the 1st stage boot loader]

--- MBR machine code may boot directly to OS or it may pass control to 2nd stage boot loader (normally, it refers to famous names: LILO, GRUB or window NTLDR)

[these 2nd stage boot loader normally have some user interaction shell, and allows user to boot from one of several installed OSes]

windows exe file format, etc

2007-05-08T20:00:00.000-07:00

some un-organized notes...

Early versions of Microsoft windows OS are DOS-based, from windows 3.0 to Windows Me, the GUI are just graphical shells of the underlying DOS system. However, the DOS basis is discarded when Microsoft moved on to Windows NT and its late variations (so called windows 2000 and windows xp).

For a executionable file to be excuted by the operating system, some common consensus over fie format has to be agreed. How does it tell the OS to find libraries, etc. This leads to the area of windows exe file format. In the current prevailing windows platform, PE (portable executable) format is assumed. Portable executable basically targets at portability over all all 32 bit Microsoft OSes. PE is developed based on the old COFF (common object file format) format on Unix.

some important but always ignored questions in ASM

2007-04-19T20:00:00.000-07:00

These are some issues which bothered me a lot when I started to code ASM. I hope to note down and share it with people.

The first fact on ASM tutorial and sample code for beginners, most of them are written for 16 bit environment!!! And, what does that mean? it means you have to compile them with 16 bit assembler and link them with 16 bit linker. If you happen to start with Microsoft MASM v8 (like me), you may use the 'ml.exe' for 16 bit or 32 bit code assembling by a command option switch, however, the default 'Link.exe' included with the package is a 32 bit linker and it does not link 16 bit object files!!!

so??? so you have to download a separate 16 bit linker(supposeably, 'lnk16.exe'), and put it in the /bin directory of your assembler installation, and specifically use it.

now that is how your compile your 16-bit code,

C:\masm32\bin\ML /c /Cp /nologo /I"C:\masm32\include" A16bit.ASM
C:\masm32\bin\Lnk16 /SUBSYSTEM:CONSOLE A16bit.obj /o A16bit.exe

(the /c option force the ML.exe to do assembling only, no linking.
/Cp keep user case sensitive symbols)

or alternatively, you can compile and link in one go,
C:\masm32\ML /Bl .\Lnk16.exe /SUBSYSTEM:CONSOLE /Cp /nologo /I"C:\masm32\include" A16bit.ASM /o A16bit.exe

then how do we compile 32-bit code? using the /coff switch. This is how you compile them in one go,
C:\masm32\ML /coff /Cp /nologo /SUBSYSTEM:WINDOWS /I"C:\masm32\include" A16bit.ASM /o A16bit.exe

(this will use the default 'link.exe')

There are actually quite a lot of options for ML and link, and you can find them out by
ML /?
link /?

2007. June. 11
some more comment regarding the 16bit issue, when you see the following code snippet in asm, they mean to be compiled by 16 bit environment,
==================
mov ax, code ; or mov ax, @data
mov ds, ax
mov es, ax
==================
such statement is NOT allowed by 32bit compilers. Under 32 bit environment, segment concept is totally different.

Dining philosophers problem

2007-04-16T02:15:00.000-07:00

http://en.wikipedia.org/wiki/Dining_philosophers_problem

some useful windows batch file command

2007-04-12T17:56:00.000-07:00

@ECHO OFF:: Check Windows version -- Windows 2000 or later

IF NOT "%OS%"=="Windows_NT" GOTO Syntax
VER FIND.EXE "Windows NT" >NUL
IF NOT ERRORLEVEL 1 GOTO Syntax

:: Save a list of ALL shares found on the source server
NET.EXE SHARE > "%~dp0%ComputerName%_originalshares.txt" 2>&1

dirty tricks in 80C51

2007-04-12T02:42:00.000-07:00

The following content is quoted from:
http://www.esacademy.com/automation/docs/c51primer/c15.htm#15

General Things to be Aware of

The ANSI standard says that the product of two 8 bit numbers is also an 8 bit number. This means that any unsigned chars which might have to be multiplied must actually be declared as unsigned int's if there is any possibility that they may produce even an intermediate result over 255.

However it is very wasteful to use integer quantities in an 8051 if a char can do the job! The solution is to temporarily convert (cast) a char to an int. Here the numerator potentially could be 16 bits but the result always 8 bits. The "(unsigned int)" casts ensure that a 16 bit multiply is used by C51.

{
unsigned char z ;
unsigned char x ;
unsigned char y ;
z = ((unsigned int) y * (unsigned int) x) >> 8 ;
}

Here the two eight bit numbers x and y are multiplied and then divided by 256. The intermediate 16 bit (unsigned int) result is permissible because y and x have been loaded by the multiplier library routine as int's.

RS485, specifications and in depth tutorial

2007-04-12T01:33:00.000-07:00

http://www.lammertbies.nl/comm/info/RS-485.html

a very good illustration of RS-485, and its difference and advantage over RS232.

Why SWT? Why not SWING? - (1)

2007-04-02T23:35:00.000-07:00

Well, this is a hard question. Do not mistake me, neither of them is better than the other. I have been using SWING for more than three years, and SWING is perfectly designed to embrace the concept of MVC (Model-View-Control). I love it.

In Java paradigm, SWING is considered a RI (reference implementation) for Java graphical specification. Yes, I believe most people will equal SWING and Java GUI library, but, that is not totally true. SWT is another implementation from IBM. I will try to touch a bit on the difference.

Java boasts its cross-platform capability of "write once, compile once, and run everywhere". The secret and cost is a virtual machine(VM) residing on every single OS species to run these compiled byte codes. SWING is part of the standard library implementation. The virtual machine will try to render every object you intended and coded on its own effort (without the help of OS). Well, this ensures the same graphics appears on different OSes (if you code wisely), but it hurts the runtime performance. This is even more sketchy in early versions of Sun JDK release. IBM has tried to tackle this problem from a fundamentally 'un-java' approach. SWT leverages the strength of MS Windows API, and let the windows draw whenever possible, and let Java draw whenelse. There are significant improvement in speed, but it becomes partially 'native'. While, you may already realized, is it still Java? emmm, that is a good question. But the fact is, SWT implementation is not bad, and it has quite a lot of users.

to be continued...

G state, D state, C state, P state, what are they? -- ACPI

2007-04-01T22:24:00.000-07:00

The following are extracted from wikipedia.org.

Global states

The ACPI specification defines the following seven states (so-called global states) an ACPI-compliant computer system can be in:

G0 Working is the normal working state of the computer, meaning that the operating system and whatever applications, run. The CPU(s) execute instructions. Within this state (i.e., without entering G1 Sleeping), it is possible for CPU(s) and devices like hard drives, DVD drives, etc. to be repeatedly put into and come back from low-energy states, called C0–Cn and D0–D3. (Laptops, for example, routinely power down all currently unused devices when running on battery; some computers do this to reduce noise.)
G1 Sleeping subdivides into the four states S1 through S4. The time needed to bring the system from here back into G0 Working (wake-latency time) is shortest for S1, short for S2 and S3, and not so short for S4.

S1 is the most power-hungry of sleep modes. All processor caches are flushed, and the CPU(s) stop executing instructions. Power to the CPU(s) and RAM is maintained; devices that do not indicate they must remain on may be powered down. Some newer machines do not support S1; older machines are more likely to support S1 than S3.

S2 is a deeper sleep state than S1, where the CPU is powered off; however, it is not commonly implemented.

S3 is called Standby in Windows, Sleep in Mac OS X, and sometimes also Suspend to RAM (STR), although the ACPI specification mentions only the terms S3 and Sleep. In this state, main memory (RAM) is still powered, although it is almost the only component that is. Since the state of the operating system and all applications, open documents, etc. lies all in main memory, the user can resume work exactly where he/she left off—the main memory content when the computer comes back from S3 is the same as when it was put into S3. (The specification mentions that S3 is rather similar to S2, only that some more components are powered down in S3.) S3 has two advantages over S4; the computer resumes in about the time it takes the monitor to come on, secondly if any running applications (open documents, etc) have private information in them, this will not be written to the disk. Desktop users using this state may want to disable disk caching (also called disk buffer) so that, in the event of a power failure, the system disk is less likely to become corrupted due to data in the cache not being written to the disk.

S4 -- Main article: Hibernate (OS feature). S4 is called Hibernation in Windows, Safe Sleep in Mac OS X, and sometimes also Suspend to disk, although the ACPI specification mentions only the term S4. In this state, all content of main memory is saved to a hard drive, preserving the state of the operating system, all applications, open documents etc. That means that after coming back from S4, the user can resume work where it was left off in much the same way as with S3. The difference between S4 and S3, apart from the added time of moving the main memory content to disk and back, is that a power loss of a computer in S3 makes it lose all data in main memory, including all unsaved documents, while a computer in S4 is unaffected. S4 is quite different from the other S states and actually resembles G2 Soft Off and G3 Mechanical Off more than it resembles S1–S3.
G2 (S5) Soft Off-- G2, S5, and Soft Off are synonyms. G2 is almost the same as G3 Mechanical Off, but some components remain powered so the computer can "wake" from input from the keyboard, LAN, or USB device [2]. This state is the same as G3 Mechanical Off, in that the boot procedure must be run to bring the system from G2 to G0 Working. G3 Mechanical Off is entered only when a power loss occurs, whereas G2 is initiated by the operating system (typically because the user issued a shutdown command in some way). The computer is not safe for disassembly in the G2 state due to the components that remain powered, however it is safe to unplug the computer and, after approximately 20 seconds, the computer will be in the G3 state. It is always advisable to unplug a desktop computer (and wait 20 seconds) prior to "disassembly", because, although internal drives are usually not powered, the (PS2) keyboard, USB ports, mainboard, expansion cards, and power supply may remain powered, even if the computer is not used to wake from input to these devices.
G3 Mechanical Off: The computer's power consumption is very close to zero, to the point that the power cord can be removed and the system is safe for disassembly (typically, only the real-time clock is running off its own small battery). The computer falls into this state when a power loss occurs, e.g. in case of a power outage. Once power is restored, a full boot procedure is necessary to bring the system from G3 to G0 Working.
Furthermore, a state Legacy is defined as the state when an operating system runs which does not support ACPI. In this state, the hardware and power are not managed via ACPI, effectively disabling ACPI.
(Reference: ACPI specification 3.0b is linked to under External links, section 7.3.4)

Device states

The device states D0-D3 are device-dependent:
D0 Fully-On is the operating state.
D1 and D2 are intermediate power states whose definition varies by device.
D3 Off has the device powered off and unresponsive to its bus.

Processor states

The CPU power states C0-C3 are defined as follows:
C0 is the operating state.
C1 (often known as Halt) is a state where the processor is not executing instructions, but can return to an executing state essentially instantaneously. Some processors, such as the Pentium 4, also support an Enhanced C1 state (C1E) for lower power consumption.
C2 (often known as Stop-Clock) is a state where the processor maintains all software-visible state, but may take longer to wake up.
C3 (often known as Sleep) is a state where the processor does not need to keep its cache coherent, but maintains other state. Some processors have variations on the C3 state (Deep Sleep, Deeper Sleep, etc.) that differ in how long it takes to wake the processor.

Performance states

While a device or processor is operating (D0 and C0, respectively), it can be in one of several power-performance states. These states are implementation-dependent, but P0 is always the highest-performance state, with P1 to Pn being successively lower-performance states, up to an implementation-specific limit of n no greater than 16.
P-states are called SpeedStep in Intel processors, Cool'n'Quiet in AMD processors and PowerSaver in VIA processors.

Key Benefits of the I/O APIC

2007-04-01T20:58:00.000-07:00

The following contains extracts from MSDN and wikipedia.com.

The Intel APIC Architecture is a system of Advanced Programmable Interrupt Controllers (APICs) designed by Intel for use in Symmetric Multi-Processor (SMP) computer systems. It was originally implemented by the Intel 82093AA and 82489DX, and is found in most x86 SMP motherboards. It is one of several attempts to solve interrupt routing efficiency issues in multiprocessor computer systems.

There are two components in the Intel APIC system, the Local APIC (LAPIC) and the I/O APIC. The LAPIC is integrated into each CPU in the system, and the I/O APIC is used throughout the system's peripheral buses. There is typically one I/O APIC for each peripheral bus in the system. In original system designs, LAPICs and I/O APICs were connected by a dedicated APIC bus. Newer systems use the system bus for communication between all APIC components.

In systems containing an 8259 PIC, the 8259 may be connected to the LAPIC in the system's bootstrap processor (BSP), or to one of the system's I/O APICs.

Sharing Interrupts Is Bad

Edge-triggered Interrupts. With any interrupt controller, an edge-triggered interrupt is a one-time event. There is no notion of feedback. The operating system never really knows when it has handled the situation that caused the interrupt; it can only know that an event happened sometime in the recent past. Therefore, the only rational response to an edge-triggered interrupt is to run all the Interrupt Service Routines (ISRs) associated with that vector once, with the hope that this will resolve it.

This situation is especially sketchy when dealing with hardware that doesn't give any real indication of why it interrupted, a common occurrence among today's edge-triggering devices. The result is that the operating system can miss interrupts delivered in the interval between when an interrupt is first taken and when it is acknowledged.

With an 8259 PIC interrupt controller, the situation is even worse. The 8259 is inherently unreliable, particularly when coupled with an actual ISA bus. The operating system software will see a number of spurious interrupts, some of which show up on different vectors than the original signal.

Level-triggered Interrupts. The protocol of a level-triggered interrupt is as follows:
•Whenever the interrupt signal is held low (for active-low interrupts, which are the most common), the interrupt controller will generate an interrupt.
•If the interrupt is acknowledged and the signal is still low, then the interrupt controller will generate another interrupt.
This is good for sharing, because it confirms that the operating system handled the interrupting device. The algorithm is:
1.Take an interrupt.
2.Run the first ISR in the chain.
3.If that ISR returns TRUE (meaning that it handled an interrupt), then the operating system will ACK the interrupt and quit.
4.If that ISR returns FALSE, then run the next ISR in the chain and go to Step 3.

An excellent example of the problem case comes when there are twelve devices all chained on one vector, common for a docked laptop. Every time the operating system takes an interrupt, the operating system must run as many as twelve ISRs before it begins to handle the condition that caused the interrupt.

more on this question, http://www.microsoft.com/whdc/system/sysperf/IO-APIC.mspx

something on Assembly language (for beginners)

2007-04-01T20:52:00.000-07:00

The different procedure calling convention.
STDCALL
Parameters are pushed to stack using right to left order.
Parameters pushed to stack are removed by the called procedure itself.

C ALL
Parameters are pushed to stack using right to left order.
Parameters pushed to stack are removed by the calling program.

PASCAL CALL
Parameters are pushed to stack using left to right order.
Parameters pushed to stack are removed by the called procedure itself.

Declaring Procedure Prototypes
MASM provides the INVOKE directive to handle many of the details important to procedure calls, such as pushing parameters according to the correct calling conventions. To use INVOKE, the procedure called must have been declared previously with a PROC statement, an EXTERNDEF (or EXTERN) statement, or a TYPEDEF. You can also place a prototype defined with PROTO before the INVOKE if the procedure type does not appear before the INVOKE. Procedure prototypes defined with PROTO inform the assembler of types and numbers of arguments so the assembler can check for errors and provide automatic conversions when INVOKE calls the procedure.

does it ring a bell on C prototype and forward declaration? :)

How to make a choice between a Macro and procedure?

Macros are processed by preprocessor, rather than the compiler. Macro invocations are replaced with the macro repetitively. It appears in the listing repetitively.

Procedures involves CALL and RET, and it appears only once in the listing;

So as a result, Macros has a larger size of compiled code, while Procedures has some overhead with CALL and RET, and thus a slower execution speed.

DDR-200, PC-1600, what is all this about

2007-04-01T20:41:00.000-07:00

The following information is based on pages from wikipedia.com.

DDR SDRAM or double-data-rate synchronous dynamic random access memory is a class of memory integrated circuit used in computers. It achieves greater bandwidth than the preceding single-data-rate SDRAM by transferring data on the rising and falling edges of the clock signal (double pumped). Effectively, it nearly doubles the transfer rate without increasing the frequency of the front side bus. Thus a 100 MHz DDR system has an effective clock rate of 200 MHz when compared to equivalent SDR SDRAM, the “SDR” being a retrospective designation.

DDR-200: DDR-SDRAM memory chips specified to operate at 100 MHz
DDR-266: DDR-SDRAM memory chips specified to operate at 133 MHz
DDR-333: DDR-SDRAM memory chips specified to operate at 166 MHz
DDR-400: DDR-SDRAM memory chips specified to operate at 200 MHz

Then what is the PC-1600? it is the data rate,

Data rate = DDR frequency * 64(mem width) / 8 (bits per byte)

See the following table.

The Myth around A20 and HMA(High Memory Area)

2007-04-01T20:37:00.000-07:00

The following is extracted from:
http://www.pcguide.com/ref/ram/logicHMA-c.html

this is the best explanation for this question I found so far.

PC memory addresses are referred to using a segment:offset addressing scheme; the segment is multiplied by 16 (shifted one hexadecimal digit to the left) and then the offset is added to it to get the real address. The original IBM PC had only 20 address lines and so its highest memory address was FFFFFh. However, the weird segment:offset addressing makes it possible to generate a linear address that is higher than this number.

Take the address FFFF:FFFF. To convert this to a linear address you take the segment and multiply it by 16, to get FFFF0. Then you add the offset, FFFF. FFFF0+FFFF in hexadecimal results in 10FFEFh. There's a problem with this: that "1" at the front requires a 21st address line to represent it, and that doesn't exist on the 8088 or 8086 processors used in the first PCs. They deal with this problem by ignoring the "1"--they treat the address simply as 0FFEFh. Software must be able to handle this "wrap around" of the memory addresses.

When Intel created the 80286 processor, it supported both protected mode and real mode. When in real mode the 80286 was supposed to behave exactly the same as an 8088 or 8086, for compatibility. However, the 80286 does have a 21st address line (it has 24), and due to a bug in its design it didn't do the wrap around in the same way as the 8088 when in real mode. When it used address FFFF:FFFF and came up with 10FFEFh for a linear address, it kept it as 10FFEFh instead of wrapping it around to 0FFEFh like on the older CPUs. This allowed the first FFEFh of extended memory (100000-10FFEFh) to be accessed by the chip even while still in real mode. This block of memory is the high memory area (HMA).

There was still the problem of ensuring compatibility of the 80286 when in real mode. IBM solved this in the original AT by using spare lines in the keyboard controller chip to manage the 21st address line (which is called the A20 line because address bits are numbered starting with zero). The keyboard controller turns off the A20 line when the processor is running in real mode, to allow for full compatibility with the older PCs. It turns it back on when running in protected mode.

Many years later, when the 640 KB limit of conventional memory began to be quite cramping, the ability to access an additional 64 KB of memory in real mode was seen as a significant advantage. (People at this time were scratching and clawing to get even 8 KB more conventional memory to let them run large programs that insisted on certain minimums). Microsoft developed a special driver called HIMEM.SYS that allowed the A20 line to be manipulated under software control. This allows the high memory area to be put to good use.
In practical terms, the high memory area is normally used by DOS itself. Specifying "DOS=HIGH" in the DOS system file CONFIG.SYS tells DOS to load a portion of its own code into the high memory area instead of into conventional memory. This frees approximately 45 KB of conventional memory for use by programs.

The final step in institutionalizing this former bug as an official PC feature was removing manipulation of the A20 line from the keyboard controller. Since that was originally a hack anyway--the controller was used because there was no better way to do it, after all, it has nothing to do with the keyboard--in many newer PCs there is a BIOS option to allow the chipset to control the A20 line directly. This provides a small performance increase compared to letting the keyboard controller manage the line.

Solute to open source project 2 -- Jakarta Commons Net

2007-03-31T08:04:00.000-07:00

I believe there is definitely no need for wordy introduction of the royal bloodline of this package. Yes, Jakarta Commons Net is also from the most respectable open source family, Apache.

To enable efficient data communication or control between a local Java application and remote native process, some intermediate network protocol and application must exist. Surprisingly, the standard JDK library does not provide enough support for such network communication, and we have to borrow some third party library tools.

I get acquainted with this package during a academic project. To accomplish a remote HSPICE simulation task, simulation data and remote execution command has to be sent over the network. I have compared a few of the available tools.

RMI -- The local client can only talk to remote application through a Java server application which resides on server side.

Sun network package -- This package is included in the current release of JDK, however, not as a standard component, which means it may not be compatible with future JDK versions.

Commercial tools -- not free. :(

some light weight implementations -- lack of the remote execution features.

The Jakarta Commons Net is such an open source effort targeting at implementing the client side of many basic Internet protocols, including FTP, TELNET, REXEC, etc. There are several reasons to the choice of Jakarta Commons Net. First of all, it provides all the necessary protocols we need, FTP, REXEC, and Rlogin. And, it is free and open source, which is very relaxed for academic use.

Specific to my problem, Jakarta Commons Net is purely Java based, which could be interfaced to our existing Java code easily and seamlessly. Another advantage of Jakarta Commons Net over other choices like RMI is that it is a purely client side library, and the remote server side could be left intact for the application to run.

Download link, license agreement and installation information of Jakarta Commons Net could be found at: http://jakarta.apache.org/commons/net/.

Solute to open source projects 1 -- G from GeoSoft

2007-03-31T07:47:00.000-07:00

G is a generic graphics library built on top of Java 2D from GeoSoft. It makes scene graph oriented 2D graphics available to client applications in a high level, easy to use way. (http://geosoft.no/graphics/index.html) It is capable of producing high quality 2D line sketches, bar plots, curve plots, and etc. It is licensed under the GNU Lesser General Public License.

Thanks to this great and open source package, I implemented the output curve 2d display with minimu effort and great visual effect for a EMC simulation package development project. In this project, G is used to plot circuit parameters, such as current, voltage, etc, with Cartesian coordinates. Note that, the G package comes with some basic image controls, like zoom-in, zoom-out, and localized magnification.

The following is a screen capture of the curve plotting generated by G from the EMC project.

MiniCAD -- a stand alone module for EMC simulation tool

2007-03-29T06:15:00.000-07:00

This is something I developed during my first job. At the time, I was expected to enhance and expand the functionality of an existing GUI-based EMC simulation package.

The tool is capable of importing standard geometry data (meshed or un-meshed), collecting user simulation input, invoking simulation engine, and process simulation output.

The next phase of the project was to add in a simple CAD like module, which enables users to create customized geometry, and generate the mesh all under-one-roof.

For ease of tuning, I started to create a stand-alone module which allows to user to input some really really simple geometry. I also implemented some basic graphics control, like zoom-in, zoom-out and mouse-rotation.

Enabled by an open source package, the miniCAD can also create some surface meshing of the graphics. See...

FlowViewer -- By the engineer, For the engineer

2007-03-28T07:28:00.000-07:00

My second job is a test software engineer position in a semiconductor testing firm. It is quite shocking to see how XML was maximizingly utilized in the testing programs. It is so heavily 'abused' that at the first look, we may think testing programs are XML programs (they are actually Java programs). XML is used to describe not only how these test are configured, but also in what sequence they are executed. A complete sapphire ATE program employs hundreds of XMLs, and it is really a headache to transverse these files to search for certain information. People have to be very sophisticated about how these files are organized, and spend a lot of time to trace certain information by opening many files in the file explorer.

I believe that a graphical based program analyzer and viewer could be very helpful. The application shall be able to load all these files in memory, and display them graphically in a organized and user-friendly fashion. User can then browse the test execution flow with a few mouse clicks, an find particular test information by a very fast memory-based search.

A little background to catch up here. The ATE tester software platform comes with a powerful (and also tricky) GUI based interface (namely, XTOS) which are used to load, run, configure, debug and log all the tests. Everything I am going to implement is already pretty encapsulated in this software suite. I am re-invent the wheels because of several considerations. Most importantly, XTOS is heavily coupled with tester hardware, which is a piece of extremely expensive (million $) hardware which we can not afford to have many. These testers are always shared by production line and we engineers, and we are always in the situation to struggle for more tester time. So if we can simulate the program by software, we saves a lot of hardware resources(and thus $!!!). Another killing factor is that, in real test setup, XTOS will try to load huge amount of test data, which takes about 1-2 hours waiting time. To properly view the test programs flow and setup, these data are not necessarily to be loaded. Last but not least, XTOS is more like a propriety software, and we are unable and also not supposed to modify its behavior and outlook to better fit our needs. So, I think it worthes the effort to create our own.

What FlowViewer is?

Flow Viewer has three functional blocks in current release:
** Test flow extraction and browse
** Test flow validation
** XML search, trace and highlight

What it is not?

*Flow Viewer is NOT part of TP
*Flow Viewer is NOT part of XTOS
*Flow Viewer is NOT a TP editor
*Flow Viewer is NOT capable to corrupt your TP

Flow Viewer is designed to be a convenient toolbox for TP owners/Test engineers.
*Flow Viewer is built on
*SWT/JFace graphics framework
*JDOM library
*XML validation Schema technology
*XPath enabled search technology

The project created a good opportunity for me to get acquainted with many XML related technologies, which I will write up to share in later posts.

ProgramManager: the first project I designed, implemented, and successfully marketed (for free)

2007-03-28T06:35:00.000-07:00

Program manager is designed to work with Jobtool for easy repository and access of current production program revision, path, and invocation command. So, developers are reminded that any modification or addition of features to PM/Jobtool must ensure proper interface with Jobtool/PM.

PM is a GUI program which reads the program list file, parses the program information, and renders programs and program descriptions as user friendly tree and tables. User may click on the program tree to browse relevant configurations in table format, and modify/add/delete programs by keyboard input.

External libraries

- JDOM.jar (to parse XML file to DOM structure)
- activation.jar (to support mail.jar)
- mail.jar (to support email function)

Implemented features:

*Graphical representation of program hierarchy
*Context sensitive program configuration display and modification
*Program expiry auto email notification
*Program list file write access grant
*User login session auto time out
*program list auto backup

emmm, put a wild card first

2007-03-27T06:24:00.000-07:00

hi, everybody, my google version blog in blogger.com is born. cheers!